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Low Power RF Circuit Design in Standard CMOS Technology

  • Book
  • © 2012

Overview

Authors:
  1. Unai Alvarado

    1. CEIT and TECNUN, University of Navarra, San Sebastián, Spain

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  2. Guillermo Bistué

    1. CEIT and TECNUN, University of Navarra, San Sebastián, Spain

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  3. Iñigo Adín

    1. CEIT and TECNUN, University of Navarra, San Sebastián, Spain

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  • It bridges the lack of specific books for High Frequency design; much of the available literature on low frequency and digital applications do not meet the RF needs
  • The book takes a practical approach throughout
  • It gives the reader multiple perspectives covering architecture alternatives, technology features and dedicated schematic circuit techniques

Part of the book series: Lecture Notes in Electrical Engineering (LNEE, volume 104)

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About this book

Low Power Consumption is one of the critical issues in the performance of small battery-powered handheld devices. Mobile terminals feature an ever increasing number of wireless communication alternatives including GPS, Bluetooth, GSM, 3G, WiFi or DVB-H. Considering that the total power available for each terminal is limited by the relatively slow increase in battery performance expected in the near future, the need for efficient circuits is now critical. This book presents the basic techniques available to design low power RF CMOS analogue circuits. It gives circuit designers a complete guide of alternatives to optimize power consumption and explains the application of these rules in the most common RF building blocks: LNA, mixers and PLLs. It is set out using practical examples and offers a unique perspective as it targets designers working within the standard CMOS process and all the limitations inherent in these technologies.

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Table of contents (8 chapters)

  1. Front Matter

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  2. Introduction

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 1-9

  3. Power Considerations in Analog RF CMOS Circuits

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 11-24

  4. Impact of Architecture Selection on RF Front-End Power Consumption

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 25-40

  5. Technology Structural Alternatives in Standard CMOS Technologies for Low-Power Analog Design

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 41-60

  6. Schematic Design Techniques for Power Saving in RF

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 61-85

  7. RF Amplifier Design

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 87-127

  8. Mixer Design

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 129-177

  9. Phase Locked Loop (PLL) Design

    • Unai Alvarado, Guillermo Bistué, Iñigo Adín
    Pages 179-236
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Authors and Affiliations

  • CEIT and TECNUN, University of Navarra, San Sebastián, Spain

    Unai Alvarado, Guillermo Bistué, Iñigo Adín

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